Apple Battery Charger User Manual Page 5

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5Maxim Integrated
USB Battery Charger Detectors
MAX14578E/MAX14578AE
Note 4: All units are 100% production tested at T
A
= +25NC. Limits over the operating temperature range are guaranteed by
design and not production tested.
Note 5: Guaranteed by design; not production tested.
ELECTRICAL CHARACTERISTICS (continued)
(V
BAT
= +2.8V to +5.5V, V
B
= +3.5V to +5.5V, T
A
= -40NC to +85NC, unless otherwise noted. Typical values are at V
BAT
= +3.6V,
V
B
= +5.0V, T
A
= +25NC.) (Note 4)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Open-Drain Low V
ODOL
I
SINK
= 1mA 0.4 V
Output Logic-High V
OH
I
SOURCE
= 1mA
V
IO
-
0.2
V
Output Logic-Low V
OL
I
SINK
= 1mA 0.2 V
DYNAMIC (Note 5)
Charge-Pump Delay Time t
CP
CP_ENA from 0 to 1 until switch on 1 ms
Analog-Switch Turn-On Time t
ON
MAX14578E, I
2
C STOP to switch on,
R
L
= 50I
0.1 1 ms
Analog-Switch Turn-Off Time t
OFF
MAX14578E, I
2
C STOP to switch off,
R
L
= 50I
0.1 1 ms
Break-Before-Make
Delay Time
t
BBM
R
L
= 50I, T
A
= +25NC
> 0
Fs
Off-Capacitance C
OFF
TD-, TD+, applied voltage is 0.5V
P-P
,
DC bias = 0V, f = 240MHz; CD-, CD+
not connected to TD-, TD+
2 pF
On-Capacitance C
ON
TD-, TD+, applied voltage is 0.5V
P-P
,
DC bias = 0V, f = 240MHz; CD-, CD+
connected to TD-, TD+; R
L
= 50I
4.5 pF
-3dB Bandwidth BW V
CD_
= 0.5V
P-P
1000 MHz
Off-Isolation V
ISO
R
L
= 50I, f = 20kHz, V
CD_
= 0.5V
P-P
-60 dB
I
2
C TIMING SPECIFICATIONS
I
2
C Max Clock f
I2CCLK
400 kHz
Bus Free Time Between STOP
and START Conditions
t
BUF
1.3
Fs
START Condition Setup Time 0.6
Fs
Repeat START Condition
Setup Time
t
SU:STA
90% to 90% 0.6
Fs
START Condition Hold Time t
HD:STA
10% of SDA to 90% of SCL 0.6
Fs
STOP Condition Setup Time t
SU:STO
90% of SCL to 10% of SDA 0.6
Fs
Clock Low Period t
LOW
10% to 10% 1.3
Fs
Clock High Period t
HIGH
90% to 90% 0.6
Fs
Data Valid to SCL Rise Time t
SU:DAT
Write setup time 100 ns
Data Hold Time to SCL Fall t
HD:DAT
Write hold time 0 ns
ESD PROTECTION
CD+, CD-
Human Body Model ±15
kV
IEC 61000-4-2 Contact Discharge ±8
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